In recent years, the production of LSIs has been shifted toward higher integration density, i.e., to 256 megabits and, further, to gigabits. The adoption of a laminate structure of a plurality of layers, such as electric wiring patterns and insulating layers, and finer design rules are necessary for the realization of higher integration density of LSIs. When the lamination and the formation of a finer pattern are simultaneously carried out, at the time of the lamination, the formation of a resist pattern on the lower layer having on its surface concaves and convexes adversely affects particularly exposure of a resist. Specifically, when the underlying layer as a resist coating face is not flat, for example, reflection notching of exposure light from the concaves and convexes on the surface of the underlying layer makes it difficult to form a resist image with predetermined resolution.
In order to solve this problem involved in the exposure of the resist, various methods for flatting the layer as the resist coating face have been developed and utilized. One of the methods for flatting is to use a CMP apparatus and has already been used in some fields. A design rule on the order of quarter microns or less has recently become adopted, and this has focused significant attention of CMP techniques.
The CMP apparatus is generally as shown in FIG. 1, wherein FIG. 1A is a cross-sectional view along the rotation center axis and FIG. 1B a top view. This apparatus comprises: a rotating base 1 having a flat surface; at least one polishing pad 2 which is provided on the surface of this base and is rotated together with the base; means (not shown) for feeding slurry to the polishing pad; a wafer-holding ring 4 (referred to also as “retainer ring” or “carrier ring”) which is provided so as to face the polishing pad and surrounds the circumference of a semiconductor wafer 3 and holds the semiconductor wafer 3 on the surface of the polishing pad; and a carrier 5 which, together with the wafer-holding ring, holds the wafer. Vibration generation means for generating relative vibration between the polishing pad and the semiconductor wafer is optionally provided. The surface of the wafer 3 is polished by rotating the rotating base 1 while feeding slurry to the area of contact between the wafer 3 and the polishing pad 2.
FIG. 1C is a cross-sectional view of another example of the CMP apparatus. In this apparatus, the wafer 3 is pressed against the polishing pad by a member 5′ provided on the inner side of the wafer-holding ring 4 and is polished. Instead of the member for pressing the wafer against the polishing pad, for example, compressed air may be used to press the wafer against the polishing pad.
The slurry used for polishing generally comprises an abrasive and an alkaline or acidic liquid for chemically reacting and dissolving a metal layer or an oxide layer. There are a wide variety of polishing objects, the surface of which can be flattened by this CMP method, such as oxide layers, polysilicon layers, and metal layers. Therefore, a best suited abrasive or slurry composition is selected according to the object to be polished. Representative abrasives usable in this slurry for CMP include colloidal silica, fumed silica, precipitated alumina, and fumed alumina. In polishing an oxide layer, in many cases, colloidal silica or fumed silica is used. When colloidal silica is used as the abrasive, the colloidal silica is generally produced from sodium silicate (Na2SiO3).
The wafer-holding ring is provided for accurately holding the semiconductor wafer at the time of polishing and changing and regulating the polished state of the surface of the semiconductor wafer. At the time of polishing of the semiconductor wafer, the wafer-holding ring comes also into contact with the polishing pad and thus is polished and abraded. Therefore, when the abrasion loss has reached a given value, the wafer-holding ring should be replaced.
Therefore, when a relatively soft resin is used as a material for the wafer-holding ring, the wafer-holding ring is rapidly abraded and, in this case, the wafer-holding ring should be frequently replaced.
In order to reduce the abrasion loss, a hard material is sometimes used as the soft resin. Conventional hard materials for wafer-holding ring are alumina and metals such as titanium. The use of metals, however, has a fear of the wafer being contaminated with the metals. Further, in some cases, the outer edge of the wafer collides with the internal circumference of the wafer-holding ring during polishing, and, consequently, the wafer is damaged.
Japanese Patent Laid-Open No. 187657/1996 discloses a wafer-holding ceramic ring. In this wafer-holding ring, although the abrasion resistance is improved, as with the wafer-holding metallic ring, the wafer is sometimes damaged.
Japanese Patent Laid-Open No. 52241/2000 discloses a method wherein the inner circumference portion of a wafer-holding ring formed of an abrasion-resistant material, that is, the wafer-holding ring in its portion, which comes into contact with the wafer, is formed of a soft material. Since this wafer-holding ring is on the assumption that the soft material used in the inner circumference portion is abraded, the thickness should be larger than that of the conventional wafer-holding ring. This requires a special design also in apparatuses utilizing this wafer-holding ring.